This section describes how metadata is extracted from source files and how to interpret the generated configuration files. It covers the following topics:
The extractor script extracts necessary configuration information from a user's register transfer level (RTL) code.
To use the extractor script, enter the following:
python $RASC/pd/shrd/extractor $RASC/design/top/acs_cm_id.h $ALG_DIR |
where $RASC is the installation path to the top of the RASC Core Services tree, and $ALG_DIR is the top of the algorithm design file tree. These variables can be set in the physical design makefile. Please see the physical design specifications for further details.
When called from a directory, extractor creates two configuration files: core_services.cfg and user_space.cfg.
The core_services.cfg file is created from the file that is passed in as the first command line argument. In the file that is passed as the first argument, extractor searches the header for the glob that begins with 'core_services_version' and ends with 'end:'.
The user_space.cfg file is created from the files in the directory that is passed as the second argument to extractor. The search includes all *.v, *.h, or *.vhd files in and below the directory that is passed as the second argument. In those files, extractor searches for any comments that start with: extractor. Then it searches for the particular tag, either CS, VERSION, REG_IN, REG_OUT, or SRAM. The line following these tags is then stored, manipulated in some cases, and written out to the user_space.cfg configuration file.
Both configuration files are written to the directory in which the script is called.
Please note that the system extractor is run upon requires a Python 2 interpreter. You can obtain the interpreter at no cost from www.python.org .
The format for entries in the core services configuration file is:
<type>:<value> |
The various fields for the configuration file are described in detail in Table C-1.
Table C-1. Core Services Configuration File Fields
Type | Description | Value | Example |
|---|---|---|---|
core_services_version | Tag for the version and revision of core services. | <version>.<revision> | core_services_version:0.7 |
part_num | Tag for the part number that corresponds to the CM_ID register in the hardware. | <hexidecimal part number> | part_num:0xF001 |
mfg_id | Tag for the manufacturer's identification number that corresponds to the CM_ID register in the hardware. | <hexidecimal manufacturer's ID> | mfg_id: 0x1 |
dma | Tag for the number and direction of the DMA engines. | <number> <direction[0] ... direction[n-1]>. | For two read and one write DMA engine, dma:3 rd rd wr |
stream_in | Tag for the number and direction of the DMA engines. | <stream_name> <identifier0-3> | stream_in: 0 0x001000000 |
stream_out | Tag for the number and direction of the DMA engines. | <stream_name> <identifier0-3> | stream_out: 0 0x001800000 |
sram[n] | Tag for the SRAMs on the board The address field is from the DMA perspective; it is not the PIO space for that SRAM. | <DMA address for sram 'n'> <size of sram 'n' in MB> | sram[0]:0x00000000000000 2MB |
amo | Tag for whether or not this core services is AMO capable | 1 is yes, 0 is no | amo:1 |
interrupt | Tag for whether or not this core services is interrupt capable | 1 is yes, 0 is no | interrupt:1 |
step | Tag for whether or not this core services is algorithm step capable. | 1 is yes, 0 is no | step:1 |
mmr | Tag for the MMR space. | <base register for PIO> <length of space> <alignment> | mmr:0x00000000000000 2KB 64 |
debug | Tag for the Debug space. | <base register for PIO> <length of space> <alignment> | debug:0x00000000100000 1MB 64 |
debug_port[n] | Tag for the PIO address of the debug register that is associated with debug port 'n'. | <PIO address for the register> <bit width of the register> | debug_port[0]:0x0000 64 |
alg_def_reg[n] | Tag for the PIO address for a register 'n' that the RASC application wants to write to the algorithm | <PIO address for the register> <bit width of the register> | alg_def_reg[0]:0x0320 64 |
end | Tag for the end of the file | It has no value | end: |
The core services configuration file should have the name core_services.cfg. This file does not use the ability for the application to write an internal register, so the file should appear as:
part_num:0xF005 mfg_id:0x1 sram[0]: 0x00000200000000 16MB sram[1]: 0x00000300000000 16MB sram[2]: 0x00000400000000 8MB stream_in:0 0x001000000 stream_in:1 0x001100000 stream_in:2 0x001200000 stream_in:3 0x001300000 stream_out:0 0x001800000 stream_out:1 0x001900000 stream_out:2 0x001a00000 stream_out:3 0x001b00000 amo:1 interrupt:1 step:1 mmr:0x00000000000000 2KB 64 debug:0x00000000100000 1MB 64 debug_port[0]: 0x00000000001000 64 debug_port[1]: 0x00000000001008 64 debug_port[2]: 0x00000000001010 64 debug_port[3]: 0x00000000001018 64 debug_port[4]: 0x00000000001020 64 debug_port[5]: 0x00000000001028 64 debug_port[6]: 0x00000000001030 64 debug_port[7]: 0x00000000001038 64 debug_port[8]: 0x00000000001040 64 debug_port[9]: 0x00000000001048 64 debug_port[10]: 0x00000000001050 64 debug_port[11]: 0x00000000001058 64 debug_port[12]: 0x00000000001060 64 debug_port[13]: 0x00000000001068 64 debug_port[14]: 0x00000000001070 64 debug_port[15]: 0x00000000001078 64 debug_port[16]: 0x00000000001080 64 debug_port[17]: 0x00000000001088 64 debug_port[18]: 0x00000000001090 64 debug_port[19]: 0x00000000001098 64 debug_port[20]: 0x000000000010A0 64 debug_port[21]: 0x000000000010A8 64 debug_port[22]: 0x000000000010B0 64 debug_port[23]: 0x000000000010B8 64 debug_port[24]: 0x000000000010C0 64 debug_port[25]: 0x000000000010C8 64 debug_port[26]: 0x000000000010D0 64 debug_port[27]: 0x000000000010D8 64 debug_port[28]: 0x000000000010E0 64 debug_port[29]: 0x000000000010E8 64 debug_port[30]: 0x000000000010F0 64 debug_port[31]: 0x000000000010F8 64 debug_port[32]: 0x00000000001100 64 debug_port[33]: 0x00000000001108 64 debug_port[34]: 0x00000000001110 64 debug_port[35]: 0x00000000001118 64 debug_port[36]: 0x00000000001120 64 debug_port[37]: 0x00000000001128 64 debug_port[38]: 0x00000000001130 64 debug_port[39]: 0x00000000001138 64 debug_port[40]: 0x00000000001140 64 debug_port[41]: 0x00000000001148 64 debug_port[42]: 0x00000000001150 64 debug_port[43]: 0x00000000001158 64 debug_port[44]: 0x00000000001160 64 debug_port[45]: 0x00000000001168 64 debug_port[46]: 0x00000000001170 64 debug_port[47]: 0x00000000001178 64 debug_port[48]: 0x00000000001180 64 debug_port[49]: 0x00000000001188 64 debug_port[50]: 0x00000000001190 64 debug_port[51]: 0x00000000001198 64 debug_port[52]: 0x000000000011A0 64 debug_port[53]: 0x000000000011A8 64 debug_port[54]: 0x000000000011B0 64 debug_port[55]: 0x000000000011B8 64 debug_port[56]: 0x000000000011C0 64 debug_port[57]: 0x000000000011C8 64 debug_port[58]: 0x000000000011D0 64 debug_port[59]: 0x000000000011D8 64 debug_port[60]: 0x000000000011E0 64 debug_port[61]: 0x000000000011E8 64 debug_port[62]: 0x000000000011F0 64 debug_port[63]: 0x000000000011F8 64 alg_def_reg[0]: 0x00000000000000 64 alg_def_reg[1]: 0x00000000000008 64 alg_def_reg[2]: 0x00000000000010 64 alg_def_reg[3]: 0x00000000000018 64 alg_def_reg[4]: 0x00000000000020 64 alg_def_reg[5]: 0x00000000000028 64 alg_def_reg[6]: 0x00000000000030 64 alg_def_reg[7]: 0x00000000000038 64 alg_def_reg[8]: 0x00000000000040 64 alg_def_reg[9]: 0x00000000000048 64 alg_def_reg[10]: 0x00000000000050 64 alg_def_reg[11]: 0x00000000000058 64 alg_def_reg[12]: 0x00000000000060 64 alg_def_reg[13]: 0x00000000000068 64 alg_def_reg[14]: 0x00000000000070 64 alg_def_reg[15]: 0x00000000000078 64 alg_def_reg[16]: 0x00000000000080 64 alg_def_reg[17]: 0x00000000000088 64 alg_def_reg[18]: 0x00000000000090 64 alg_def_reg[19]: 0x00000000000098 64 alg_def_reg[20]: 0x000000000000a0 64 alg_def_reg[21]: 0x000000000000a8 64 alg_def_reg[22]: 0x000000000000b0 64 alg_def_reg[23]: 0x000000000000b8 64 alg_def_reg[24]: 0x000000000000c0 64 alg_def_reg[25]: 0x000000000000c8 64 alg_def_reg[26]: 0x000000000000d0 64 alg_def_reg[27]: 0x000000000000d8 64 alg_def_reg[28]: 0x000000000000e0 64 alg_def_reg[29]: 0x000000000000e8 64 alg_def_reg[30]: 0x000000000000f0 64 alg_def_reg[31]: 0x000000000000f8 64 alg_def_reg[32]: 0x00000000000100 64 alg_def_reg[33]: 0x00000000000108 64 alg_def_reg[34]: 0x00000000000110 64 alg_def_reg[35]: 0x00000000000118 64 alg_def_reg[36]: 0x00000000000120 64 alg_def_reg[37]: 0x00000000000128 64 alg_def_reg[38]: 0x00000000000130 64 alg_def_reg[39]: 0x00000000000138 64 alg_def_reg[40]: 0x00000000000140 64 alg_def_reg[41]: 0x00000000000148 64 alg_def_reg[42]: 0x00000000000150 64 alg_def_reg[43]: 0x00000000000158 64 alg_def_reg[44]: 0x00000000000160 64 alg_def_reg[45]: 0x00000000000168 64 alg_def_reg[46]: 0x00000000000170 64 alg_def_reg[47]: 0x00000000000178 64 alg_def_reg[48]: 0x00000000000180 64 alg_def_reg[49]: 0x00000000000188 64 alg_def_reg[50]: 0x00000000000190 64 alg_def_reg[51]: 0x00000000000198 64 alg_def_reg[52]: 0x000000000001a0 64 alg_def_reg[53]: 0x000000000001a8 64 alg_def_reg[54]: 0x000000000001b0 64 alg_def_reg[55]: 0x000000000001b8 64 alg_def_reg[56]: 0x000000000001c0 64 alg_def_reg[57]: 0x000000000001c8 64 alg_def_reg[58]: 0x000000000001d0 64 alg_def_reg[59]: 0x000000000001d8 64 alg_def_reg[60]: 0x000000000001e0 64 alg_def_reg[61]: 0x000000000001e8 64 alg_def_reg[62]: 0x000000000001f0 64 alg_def_reg[63]: 0x000000000001f8 64 end: |
The format for entries in the algorithm configuration file is:
<type>:<value> |
The various fields for the configuration file are described in detail in Table C-2..
Table C-2. Algorithm Configuration File Fields
Type | Description | Value | Example |
|---|---|---|---|
core_services_version | Tag detailing which iteration of core services was used in this bitstream. | <version> | core_services_version:0.7 |
algorithm_version | Tag for the type and version number of the algorithm in this bitstream. This is user defined but it should match the first register in the debug space (see Hardware Reference for more details.) | <version> | algorithm_version:0.12 |
src | Tag for source type that generated the algorithm. | Verilog by default and VHDL if ANY .vhd file exists in the hierarchy | src:v |
reg | Tag for the registers that are PIO written or read by the application or the debugger and where the value will be mapped in the address space. | <register name> <bit width of register> <data type of the element mapped> <port mapping to the application or the debug relevant debug register> | reg:a 64 u debug_port[1] |
array | Tag for the SRAM inputs and outputs to the algorithm. | <array name> <number of elements in array> <width of an element in bits> <associated SRAM bank for array> <byte offset into the SRAM bank> <direction of array: in, out, or inout> <data type for the elements in array> <whether the array is streaming or fixed> | array:a_in 512 64 sram[0] 0x0000 in u stream |
stream_in | Tag for streaming input to the algorithm | <stream name> <stream number> <stride> | stream_in:strm_a 0 0 |
stream_out | Tag for streaming output to the algorithm | <stream name> <stream number> <stride> | stream_out:strm_b 0 0 |
end | Tag for the end of the file. | It has no value field. | end: |
The name of the algorithm configuration file that is generated by the extractor script will be user_space.cfg. This name can be changed after the script is run at the discretion of the user. The algorithm configuration file should appear as follows:
core_services_version:0.7 algorithm_version:0.6 src:v reg:a_0 64 u debug_port[1] reg:b_0 64 u debug_port[2] reg:c_0 64 u debug_port[3] reg:tmp 64 u debug_port[4] reg:d_0 64 u debug_port[5] reg:i_0 64 u debug_port[6] array:a 512 64 sram[0] 0x00 in u stream array:b 512 64 sram[1] 0x00 in u stream array:c 512 64 sram[2] 0x00 in u stream array:d 512 64 sram[0] 0x00 out u stream end: |