List of Figures

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Figure 2-1. Parallel Analyzer View Main Window
Figure 2-2. Loop Display Controls
Figure 2-3. Show Loop Types Option Button
Figure 2-4. Filtering Option Button
Figure 2-5. Subroutines and Files View
Figure 2-6. Source View
Figure 2-7. Transformed Source Window
Figure 2-8. Loop Information Display Without Performance Data
Figure 2-9. Transformed Loops View for Loop Olid 1
Figure 2-10. Transformed Loops in Source Windows
Figure 2-11. Explicitly Parallelized Loop
Figure 2-12. Source View of C$OMP PARALLEL DO Directive
Figure 2-13. Parallelizable Data Dependence
Figure 2-14. Highlighting on Multiple Lines
Figure 2-15. Requesting a C$OMP PARALLEL DO Directive
Figure 2-16. Parallelization Control View After Choosing C$OMP PARALLEL DO...
Figure 2-17. Effect of Changes on the Loop List
Figure 2-18. Deleting an Assertion
Figure 2-19. Run gdiff After Update
Figure 2-20. Build View of Build Manager
Figure 2-21. Loops Explicitly Parallelized Using C$OMP DO
Figure 2-22. Loops Using C$OMP BARRIER Synchronization
Figure 2-23. C$SGI DISTRIBUTE Directive and Text Field
Figure 3-1. Array Statement into DO Loop
Figure 3-2. Loop 22
Figure 3-3. Loop 23
Figure 3-4. Array Statement into a Subroutine
Figure 4-1. Explicitly Parallelized Loop
Figure 4-2. Obstacles to Parallelization
Figure 4-3. Creating a Parallel Directive
Figure 4-4. Parallelization Control View
Figure 4-5. Adding an Assertion
Figure 4-6. Deleting an Assertion
Figure 4-7. Loops Explicitly Parallelized Using #pragma omp for
Figure 4-8. #pragma distribute Directive and Text Field
Figure 5-1. Parallel Analyzer View -- Performance Data Loaded
Figure 5-2. Source View for Performance Experiment
Figure 5-3. Sort by Performance Cost
Figure 5-4. Loop Information Display With Performance Data
Figure 6-1. Parallel Analyzer View Main Window
Figure 6-2. Output Text File Selection Dialog
Figure 6-3. Project Submenu and Windows
Figure 6-4. Operations Menu and Submenus
Figure 6-5. Loop List Display
Figure 6-6. Loop List with Column Headings
Figure 6-7. Loop Display Controls
Figure 6-8. Loop Information Display
Figure 6-9. Loop Parallelization Controls
Figure 6-10. MP Chunk Size Field Changed
Figure 6-11. Obstacles to Parallelization Block
Figure 6-12. Assertion Information Block and Options (n32 and n64 Compilation)
Figure 6-13. Parallelization Control View
Figure 6-14. Parallelization Control View With C$OMP PARALLEL DO Directive
Figure 6-15. Parallelization Control View With C$OMP DO Directive
Figure 6-16. Transformed Loops View
Figure 6-17. PFA Analysis Parameters View
Figure 6-18. Subroutines and Files View
Figure 6-19. Original and Transformed Source Windows
Figure A-1. Explicitly Parallelized Loops Using C$PAR PDO
Figure A-2. Loops Using C$PAR BARRIER Synchronization