POWER Fortran Accelerator User's Guide

Document Number: 007-0715-060


Written by Chris Hogue and David Graves

Edited by Janiece Carrico

Production by Gloria Ackley

Engineering contributions by Bron Nelson, Deb Caruso, and Mike Humphrey

© Copyright 1991–1994, Silicon Graphics, Inc.— All Rights Reserved

This document contains proprietary and confidential information of Silicon Graphics, Inc. The contents of this document may not be disclosed to third parties, copied, or duplicated in any form, in whole or in part, without the prior written permission of Silicon Graphics, Inc.


Use, duplication, or disclosure of the technical data contained in this document by the Government is subject to restrictions as set forth in subdivision (c) (1) (ii) of the Rights in Technical Data and Computer Software clause at DFARS 52.227-7013 and/or in similar or successor clauses in the FAR, or in the DOD or NASA FAR Supplement. Unpublished rights are reserved under the Copyright Laws of the United States. Contractor/manufacturer is Silicon Graphics, Inc., 2011 N. Shoreline Blvd., Mountain View, CA 94039-7311.

Silicon Graphics and IRIS are registered trademarks, and POWER Fortran Accelerator, POWER Series, and IRIX are trademarks of Silicon Graphics, Inc. Cray is a trademark of Cray Research. VAST is a trademark of Pacific Sierra Research, Inc. VMS is a trademark of Digital Equipment Corporation.

Kuck and Associates, Inc., is the supplier of the optimizer used in this product.