List of Figures

| Table of Contents | List of Figures | List of Tables |

Figure 1. Organization of this Manual
Figure 1-1. Developmental Path of SGI Multiprocessing Architectures
Figure 1-2. Nodes in an Origin2000 System
Figure 1-3. Single Datapath Over a Bus
Figure 1-4. Multi-dimensional Datapaths Through an Interconnection Fabric
Figure 1-5. Origin200 Mother and Daughterboards
Figure 1-6. Location of Origin200 PCI slots
Figure 1-7. Layout of Origin200 Memory
Figure 1-8. Origin2000 Block Diagram
Figure 1-9. Block Diagram of a System with 4 Nodes
Figure 1-10. Exploded View of the Origin2000 Deskside Chassis
Figure 1-11. Front View of Origin2000 Chassis, with Components
Figure 1-12. Front View of Origin2000 Chassis, Front Facade Removed
Figure 1-13. Rear View of Origin2000 Chassis
Figure 1-14. Block Diagram of an Origin2000 System
Figure 1-15. Datapaths in an Interconnection Fabric
Figure 1-16. Logical Illustration of a Four-by-Four (4 x 4) Crossbar
Figure 1-17. Crossbar Operation
Figure 1-18. Memory Hierarchy, Based on Relative Latencies and Data Capacities
Figure 2-1. Block Diagram of the Node Board
Figure 2-2. Horizontal In-Line Memory Module
Figure 2-3. Origin2000 Address Space
Figure 2-4. Memory Banks and Interleaving
Figure 2-5. Cache Lines and Memory Pages
Figure 2-6. Allocating Physical Memory to Virtual Processes
Figure 2-7. Converting Virtual to Physical Addresses
Figure 2-8. Virtual-to-Physical Address Mapping in a TLB Entry
Figure 2-9. Exclusive Data
Figure 2-10. Shared Data
Figure 2-11. Directory-Based Coherence
Figure 2-12. Origin2000 Local and Remote Page Access Counters
Figure 2-13. Physical View of the Node Board
Figure 2-14. Crossbow Connections
Figure 2-15. Location of a Router Board in an Origin2000 System
Figure 2-16. Physical View of the Router Board
Figure 2-17. Routing Board Connectors
Figure 2-18. 16P System Using Xpress Links
Figure 2-19. 24P System
Figure 2-20. 32P System Using Xpress Links
Figure 2-21. Physical Location of the Midplane in Deskside Enclosure
Figure 2-22. Front View of the Midplane
Figure 2-23. Rear View of the Origin2000 Midplane Board
Figure 2-24. Logical Location of an BaseIO Board in an Origin2000 System
Figure 2-25. BaseIO Board Block Diagram
Figure 2-26. Physical Layout of the BaseIO Board
Figure 2-27. MIO Board Block Diagram
Figure 2-28. Crosstown Link
Figure 3-1. ASIC Protocols
Figure 3-2. Block Diagram of a Hub ASIC
Figure 3-3. Block Diagram of the Router ASIC
Figure 3-4. Functional Location of Crossbow ASIC
Figure 3-5. Block Diagram of a Crossbow ASIC, Showing Eight Ports Connected to Widgets
Figure 3-6. Bridge ASIC
Figure 3-7. Block Diagram of LINC ASICs With Bridge ASIC