Chapter 1, “Product Overview” provides a high-level view of the following architectural features of a Silicon Graphics UltimateVision system:
Scalable system architecture
Scalable graphics architecture
Use of commodity graphics
This chapter describes more details about its hardware features along with some other hardware-related features. The following chapters describe its programming features.
This section describes the hardware features of the Silicon Graphics Onyx4 UltimateVision visualization system for IRIX.
The Silicon Graphics Onyx4 UltimateVision system is available in a number of configurations to meet your visualization requirements:
Power configuration
Team configuration
Extreme configuration
These configurations are described in section “System Configurations” in Chapter 1. This section describes the two graphics bricks used in Onyx4 systems as well as the architecture of its graphics pipes.
An Onyx4 system uses two kinds of bricks for graphics output: a graphics-only brick ( G2-brick) and a graphics/node brick (G2N-brick). The G2-brick is a 2U rack-mountable enclosure containing two high-performance graphics pipes. This brick connects as an I/O device. The G2N-brick is a 2U rack-mountable enclosure which, in addition to the two high-performance graphics pipes, adds to the host system a node board with two or four CPUs and up to eight memory DIMMs. This brick connects as an integral part of the host system's compute fabric. Though it contains CPUs and memory, the G2N-brick does not have boot I/O functionality and, therefore, may not be used as a standalone system. Though internally different, the G2-brick and the G2N-brick may not be distinguished by external features.
Each G2-brick or G2N-brick contains two graphics pipes, each capable of supporting 2 display devices. An Onyx4 system may contain up to 16 such bricks, providing a maximum of 32 pipes and 64 display devices.
Each graphics pipe in an Onyx4 brick contains an ATI FireGL X2-256 accelerator, which is a high-performance board based on the FGL 9800 Visual Processing Unit, featuring four geometry pipelines and eight pixel pipelines. The R350 chip that it contains is also used in the consumer versions of the ATI boards: Radeon 9800 Pro and 9900 Pro. R350 upgrades R300, which was the basis for Radeon 9500 Pro and 9700 Pro. This graphics pipeline supports full 24-bit floating point precision per channel throughout and 32-bit per-color component framebuffer.
256MB of on-board memory, combined with GDDR2 memory running at an effective clock rate of 700MHz or 22.4 GB/s of theoretical peak memory bandwidth makes it suitable for applications and configurations that demand high-framebuffer resolution, rich texture content, antialiasing, and/or anisotropic filtering. Of the total memory size, 128MB is reserved for textures, display lists, and vertex array objects (VAOs) with the remaining 128MB used by the framebuffer, command FIFO, and pbuffers. Any leftover framebuffer memory is available for additional texture, display lists, or VAOs.
The geometry engine on an Onyx4 system has four vertex engines, each capable of executing a single vector operation per clock. Thus, the theoretical peak transform rate is one vertex per clock. Similarly, the shader engine is capable of executing an operation (arithmetic/logical/texture interpolation) on eight pixel fragments in parallel. In both cases, the observed performance will likely be limited by factors like memory bandwidth and cache misses.
Onyx4 graphics is equipped with a highly tuned memory controller to better arbitrate reads and writes during periods of heavy use. This should improve performance for rendering antialiased scenes. Also, caching behavior for Z-buffer and stencil buffer reads has been optimized. As a result, certain special effects like stencil shadow volumes will see substantially better performance.
One of the biggest bottlenecks in many rendering applications is related to managing of the vertex data and feeding the pipeline efficiently. Typically, individual vertices are maintained in the client memory and copied repeatedly every time they are needed. The new GPU allows for creation of vertex arrays and index arrays in persistent server-side memory, dramatically improving the efficiency of data transfers. Refer to sections “Retained Data Model” in Chapter 6 and “Vertex Array Objects (VAOs)” in Chapter 6 for more details. Further, the UltimateVision GPU maintains a cache of transformed vertices. When you render the same vertex twice, the GPU uses the already transformed version of this vertex from its cache. Refer to sections “ Element Arrays” in Chapter 6 and “Vertex Caches” in Chapter 6 for details on how to best leverage this feature.
Fill-limited applications can often benefit from another feature of UltimateVision graphics: Hyper-Z III hidden-surface removal, which subdivides the depth buffer into blocks of 8x8 pixels. Taking advantage of the spatial coherence of depth values, this feature compresses depth values within each block to get fairly high compression ratios (up to 24:1) and to dramatically lower the bandwidth requirements to and from the depth buffer. In addition, since each of the 8x8 pixel block is equipped with a flag that indicates if the block has been cleared without necessarily touching each and every pixel within the block, this features provides the “ Fast Z clear” capability. Finally, each block contains a block-wide near-Z value, which is updated every time any of the pixels is written. This feature permits the fragment engine to ignore any fragments that fall within a block but fail the block-wide Z test (this is called “overdraw”). Only if the fragment is in front of the block-wide near-Z, does the entire block get fetched into the cache and decompressed, and individual depth values are inspected for detailed tests. Conceptually, this functionality is equivalent to a two-level hierarchical depth test and further reduces depth buffer traffic. Refer to section “Hyper-Z Depth Test” in Chapter 6 to find out how your application can take further advantage of this feature.
Multitexturing allows several different textures (up to 16 on Onyx4 systems) to be bound independently and applied to the same primitive. OpenGL allows combining individual textures in a fairly arbitrary fashion. For example, level-of-detail and light maps can both be easily implemented with multitexturing. Such effects can also be reproduced with a multipass approach: the base texture is applied first, followed by the first detail texture, and so on. However, multitexturing is substantially faster because it does not need to transform or rasterize the same primitive multiple times; thus, multitexturing gets substantial transform rate savings.
UltimateVision systems offer a Programmable Jitter Multi-Sampling (PJMS) system, referred to as SmoothVision 2.0, for full-scene antialiasing (FSAA), which can dramatically decrease edge jaggedness and other aliasing artifacts. Two, four, or six samples per pixel can be computed on a per-pixel basis. Unlike super-sampling approaches used by similar chips, which essentially render the scene at a higher resolution, PJMS improves the image quality with fewer performance penalties related to increased fill/bandwidth requirements. In addition, the UltimateVision FSAA implementation also inspects the values in the Z-buffer to minimize shimmering artifacts at the interface of adjacent and intersecting polygons.
Further improvements in rendering speed are achieved using techniques similar to the Hyper-Z depth buffer. The framebuffer is subdivided into 8x8 blocks that are compressed losslessly to save the bandwidth. Finally, SmoothVision 2.0 provides gamma correction for color gradients making color ramps appear much smoother than with any other graphics accelerator.